| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
144-LQFP |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tray |
| Series |
MAX® 3000A |
| JESD-609 Code |
e3 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
144 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Matte Tin (Sn) |
| Additional Feature |
YES |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.5mm |
| Reach Compliance Code |
compliant |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| Base Part Number |
EPM3256 |
| JESD-30 Code |
S-PQFP-G144 |
| Qualification Status |
Not Qualified |
| Supply Voltage-Max (Vsup) |
3.6V |
| Power Supplies |
2.5/3.33.3V |
| Supply Voltage-Min (Vsup) |
3V |
| Programmable Type |
In System Programmable |
| Number of I/O |
116 |
| Clock Frequency |
95.2MHz |
| Propagation Delay |
10 ns |
| Number of Gates |
5000 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
256 |
| JTAG BST |
YES |
| Voltage Supply - Internal |
3V~3.6V |
| Delay Time tpd(1) Max |
10ns |
| Number of Logic Elements/Blocks |
16 |
| Height Seated (Max) |
1.6mm |
| Length |
20mm |
| Width |
20mm |
| RoHS Status |
RoHS Compliant |
EPM3256ATI144-10N Overview
There are 256 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.It is contained in package [0].As a result, it has 116 I/O ports programmed.Devices are programmed with terminations of [0].There is a QUADterminal position on the electrical part in question.Power is supplied by a voltage of 3.3V volts.It belongs to the family [0].Package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Ideally, the chip should be mounted by Surface Mount.In FPGA terms, it is a type of MAX? 3000Aseries FPGA.This device also displays [0].Its related parts can be found in the [0].5000gates are used to construct digital circuits.There are 16 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.A power supply of 2.5/3.33.3Vvolts is required to operate this device.There is a maximum supply voltage (Vsup) of 3.6V.If the supply voltage (Vsup) is greater than 3V, then the device will work properly.Ideally, its clock frequency should not exceed 95.2MHz.
EPM3256ATI144-10N Features
144-LQFP package
116 I/Os
The operating temperature of -40°C~85°C TA
2.5/3.33.3V power supplies
EPM3256ATI144-10N Applications
There are a lot of Intel EPM3256ATI144-10N CPLDs applications.
- Auxiliary Power Supply Isolated and Non-isolated
- Random logic replacement
- Software-driven hardware configuration
- I2C BUS INTERFACE
- State machine control
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Battery operated portable devices
- Custom state machines
- Reset swapping
- White goods (Washing, Cold, Aircon ,...)