| Parameters |
| Factory Lead Time |
8 Weeks |
| Mounting Type |
Surface Mount |
| Package / Case |
100-TQFP |
| Surface Mount |
YES |
| Operating Temperature |
0°C~85°C TJ |
| Packaging |
Tray |
| Published |
2003 |
| Series |
MAX® II |
| JESD-609 Code |
e0 |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
100 |
| ECCN Code |
EAR99 |
| Terminal Finish |
TIN LEAD |
| Additional Feature |
YES |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
235 |
| Supply Voltage |
1.8V |
| Terminal Pitch |
0.5mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
EPM240 |
| JESD-30 Code |
S-PQFP-G100 |
| Qualification Status |
Not Qualified |
| Supply Voltage-Max (Vsup) |
1.89V |
| Power Supplies |
1.5/3.31.8V |
| Supply Voltage-Min (Vsup) |
1.71V |
| Programmable Type |
In System Programmable |
| Number of I/O |
80 |
| Propagation Delay |
6.1 ns |
| Output Function |
MACROCELL |
| Number of Macro Cells |
192 |
| JTAG BST |
YES |
| Voltage Supply - Internal |
1.71V~1.89V |
| Delay Time tpd(1) Max |
4.7ns |
| Number of Logic Elements/Blocks |
240 |
| Height Seated (Max) |
1.2mm |
| Length |
14mm |
| Width |
14mm |
| RoHS Status |
Non-RoHS Compliant |
EPM240GT100C4 Overview
Currently, there are 192 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.In the 100-TQFPpackage, you will find it.It is programmed with 80 I/Os.Devices are programmed with terminations of [0].QUADis the terminal position of this electrical part.It is powered by a voltage of 1.8V volts.It belongs to the family [0].Package the chip by Tray.A reliable operation is ensured by the operating temperature of [0].Surface Mountshould be used for mounting the chip.It is a type of FPGA belonging to the MAX? II series.If this device is used, you will also be able to find [0].The EPM240indicates that related parts can be found.There are 240 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.Currently, it is powered by 1.5/3.31.8Vsources.In this case, the maximum supply voltage (Vsup) is 1.89V.In order to operate properly, the supply voltage (Vsup) should be greater than 1.71V.
EPM240GT100C4 Features
100-TQFP package
80 I/Os
The operating temperature of 0°C~85°C TJ
1.5/3.31.8V power supplies
EPM240GT100C4 Applications
There are a lot of Intel EPM240GT100C4 CPLDs applications.
- Page register
- Battery operated portable devices
- PULSE WIDTH MODULATION (PWM)
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- INTERRUPT SYSTEM
- Software Configuration of Add-In Boards
- TIMERS/COUNTERS
- Custom shift registers
- Parity generators
- Reset swapping