AM3352BZCZA100
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Package / Case | 324-LFBGA |
| Surface Mount | YES |
| Number of Pins | 324 |
| Weight | 1.713814g |
| Operating Temperature | -40°C~105°C TJ |
| Packaging | Tray |
| Series | Sitara™ |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 324 |
| ECCN Code | 5A992.C |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Subcategory | Microprocessors |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.325V |
| Terminal Pitch | 0.8mm |
| Frequency | 1GHz |
| Base Part Number | AM3352 |
| Voltage | 1.144V |
| Interface | CAN, Ethernet, I2C, SPI, UART, USB |
| Max Supply Voltage | 1.378V |
| Min Supply Voltage | 912mV |
| RAM Size | 64kB |
| Memory Type | Cache, RAM, ROM |
| uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
| Core Processor | ARM® Cortex®-A8 |
| Supply Current-Max | 400mA |
| Bit Size | 32 |
| Data Bus Width | 32b |
| Core Architecture | ARM |
| Boundary Scan | YES |
| Low Power Mode | YES |
| Format | FIXED POINT |
| Integrated Cache | YES |
| Voltage - I/O | 1.8V 3.3V |
| Number of UART Channels | 6 |
| Ethernet | 10/100/1000Mbps (2) |
| Number of Cores/Bus Width | 1 Core 32-Bit |
| Graphics Acceleration | Yes |
| RAM Controllers | LPDDR, DDR2, DDR3, DDR3L |
| USB | USB 2.0 + PHY (2) |
| Additional Interfaces | CAN, I2C, McASP, McSPI, MMC/SD/SDIO, UART |
| Co-Processors/DSP | Multimedia; NEON™ SIMD |
| Number of Cores | 1 |
| Security Features | Cryptography, Random Number Generator |
| Display & Interface Controllers | LCD, Touchscreen |
| Height | 1.4mm |
| Length | 15mm |
| Width | 15mm |
| Thickness | 900μm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
AM3352BZCZA100 Description
The AM3352BZCZA100 microprocessors, which are based on the ARM Cortex-A8 processor, come with imaging, graphics, peripherals, and industrial interface choices like EtherCAT and PROFIBUS. The AM3352BZCZA100 is a high-level operating system support device (HLOS). TI provides free versions of the Processor SDK Linux? and TI-RTOS. The subsystems illustrated in the Functional Block Diagram are included in the AM3352BZCZA100 microprocessor, and a brief description of each follows: A brief description of each of the subsystems illustrated in the Functional Block Diagram follows: The microprocessor unit (MPU) subsystem uses an ARM Cortex-A8 processor, while the PowerVR SGXTM Graphics Accelerator subsystem supports 3D graphics acceleration for display and gaming effects.
AM3352BZCZA100 Features
On-Chip Memory (Shared L3 RAM)
External Memory Interfaces (EMIF)
Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
Power, Reset, and Clock Management (PRCM) Module
Real-Time Clock (RTC)
AM3352BZCZA100 Applications
Gaming Peripherals
Home and Industrial Automation
Consumer Medical Appliances
Printers
Smart Toll Systems
Connected Vending Machines
Weighing Scales
Educational Consoles
Advanced Toys