74VHC112M
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 143mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2007 |
| Series | 74VHC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 3.3V |
| Base Part Number | 74VHC112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Clock Frequency | 185MHz |
| Propagation Delay | 15 ns |
| Quiescent Current | 2μA |
| Turn On Delay Time | 5.1 ns |
| Family | AHC/VHC |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 8mA 8mA |
| Max I(ol) | 0.008 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 10.5ns @ 5V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 5 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.5mm |
| Length | 10mm |
| Width | 4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74VHC112M Overview
16-SOIC (0.154, 3.90mm Width)is the packaging method. There is an embedded version in the package Tube. As configured, the output uses Differential. The trigger configured with it uses Negative Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~5.5V. A temperature of -40°C~85°C TAis considered to be the operating temperature. This logic flip flop is classified as type JK Type. In terms of FPGAs, it belongs to the 74VHC series. You should not exceed 185MHzin its output frequency. There are 16 terminations,The 74VHC112 family contains it. Power is provided by a 3.3V supply. A JK flip flop with a 4pFfarad input capacitance is used here. Devices in the AHC/VHCfamily are electronic devices. There is an electronic part that is mounted in the way of Surface Mount. As you can see from the design, it has pins with 16. In this device, the clock edge trigger type is Negative Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. To achieve this superior flexibility, 2 circuits are used. Considering the reliability of this T flip flop, it is well suited for RAIL. It has 5lines. It consumes a total of 2μA quiescent current at any given time.
74VHC112M Features
Tube package
74VHC series
16 pins
74VHC112M Applications
There are a lot of ON Semiconductor 74VHC112M Flip Flops applications.
- Storage registers
- Counters
- Data Synchronizers
- Shift registers
- Consumer
- Dynamic threshold performance
- Memory
- Asynchronous counter
- Storage Registers
- Frequency Dividers