| Parameters |
| Factory Lead Time |
4 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
| Contact Plating |
Tin |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
14-SOIC (0.154, 3.90mm Width) |
| Number of Pins |
14 |
| Weight |
240.999296mg |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Published |
2016 |
| Series |
74LVX |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
14 |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Packing Method |
TAPE AND REEL |
| Technology |
CMOS |
| Voltage - Supply |
2V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Supply Voltage |
2.7V |
| Base Part Number |
74LVX74 |
| Function |
Set(Preset) and Reset |
| Output Type |
Differential |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
3.6V |
| Power Supplies |
3.3V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Channels |
2 |
| Load Capacitance |
50pF |
| Clock Frequency |
85MHz |
| Propagation Delay |
19.1 ns |
| Quiescent Current |
2μA |
| Turn On Delay Time |
5.7 ns |
| Family |
LV/LV-A/LVX/H |
| Logic Function |
AND, D-Type, Flip-Flop |
| Current - Output High, Low |
4mA 4mA |
| Number of Bits per Element |
1 |
| Max Propagation Delay @ V, Max CL |
13.2ns @ 3.3V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4pF |
| Number of Input Lines |
4 |
| fmax-Min |
80 MHz |
| Clock Edge Trigger Type |
Positive Edge |
| Max Frequency@Nom-Sup |
50000000Hz |
| Width |
3.9mm |
| Radiation Hardening |
No |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
74LVX74MX Overview
14-SOIC (0.154, 3.90mm Width)is the way it is packaged. The package Tape & Reel (TR)contains it. There is a Differentialoutput configured with it. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. Powered by a 2V~3.6Vvolt supply, it operates as follows. A temperature of -40°C~85°C TAis considered to be the operating temperature. This logic flip flop is classified as type D-Type. The 74LVXseries comprises this type of FPGA. Its output frequency should not exceed 85MHz. There are 14 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. D latch belongs to the 74LVX74 family. The power source is powered by 2.7V. This JK flip flop has a 4pFfarad input capacitance. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. It is mounted in the way of Surface Mount. This board is designed with 14pins on it. A Positive Edgeclock edge trigger is used in this device. This device is part of the FF/Latchesbase part number family. Vsup reaches 3.6V, the maximal supply voltage. A normal operating voltage (Vsup) should remain above 2V. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. In order for the device to operate, it requires 3.3V power supplies. It has 4lines. There is a consumption of 2μAof quiescent current from it. There are 2 channels available.
74LVX74MX Features
Tape & Reel (TR) package
74LVX series
14 pins
3.3V power supplies
74LVX74MX Applications
There are a lot of ON Semiconductor 74LVX74MX Flip Flops applications.
- Storage registers
- Storage Registers
- ESD protection
- Single Down Count-Control Line
- Digital electronics systems
- Frequency Dividers
- Buffered Clock
- Buffer registers
- Divide a clock signal by 2 or 4
- Reduced system switching noise