| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74LVX |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
MATTE TIN |
| Technology |
CMOS |
| Voltage - Supply |
2V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
2.7V |
| Terminal Pitch |
0.65mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| JESD-30 Code |
R-PDSO-G20 |
| Function |
Standard |
| Qualification Status |
COMMERCIAL |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
3.6V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Ports |
2 |
| Clock Frequency |
75MHz |
| Family |
LV/LV-A/LVX/H |
| Current - Quiescent (Iq) |
4μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
4mA 4mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
16.7ns @ 3.3V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4pF |
| Length |
6.5mm |
| Width |
4.4mm |
| RoHS Status |
ROHS3 Compliant |
74LVX574MTC Overview
The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. As part of the package Tube, it is embedded. Tri-State, Non-Invertedis the output configured for it. This trigger is configured to use Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 2V~3.6Vis used as the supply voltage. Temperature is set to -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. This type of FPGA is a part of the 74LVX series. There should be no greater frequency than 75MHzon its output. A total of 1elements are contained within it. As a result, it consumes 4μA of quiescent current without being affected by external factors. The number of terminations is 20. It is powered from a supply voltage of 2.7V. Its input capacitance is 4pF farads. A device of this type belongs to the family of LV/LV-A/LVX/H. As soon as 3.6Vis reached, Vsup reaches its maximum value. A normal operating voltage (Vsup) should remain above 2V. The flip flop contains 2ports.
74LVX574MTC Features
Tube package
74LVX series
74LVX574MTC Applications
There are a lot of Rochester Electronics, LLC 74LVX574MTC Flip Flops applications.
- Safety Clamp
- QML qualified product
- Power down protection
- Common Clocks
- Parallel data storage
- Single Down Count-Control Line
- Data Synchronizers
- ESD protection
- Guaranteed simultaneous switching noise level
- Communications