74LVX374MTC
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVX |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Ports | 2 |
| Clock Frequency | 95MHz |
| Family | LV/LV-A/LVX/H |
| Current - Quiescent (Iq) | 4μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 14.1ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 23 ns |
| Length | 6.5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
74LVX374MTC Overview
20-TSSOP (0.173, 4.40mm Width)is the packaging method. You can find it in the Tubepackage. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. This electronic part is mounted in the way of Surface Mount. With a supply voltage of 2V~3.6V volts, it operates. It is operating at a temperature of -40°C~85°C TA. This logic flip flop is classified as type D-Type. This type of FPGA is a part of the 74LVX series. There should be no greater frequency than 95MHzon its output. The element count is 1 . This process consumes 4μA quiescents. There are 20 terminations,The D flip flop is powered by a voltage of 2.7V . This T flip flop has a capacitance of 4pF farads at the input. In this case, the D flip flop belongs to the LV/LV-A/LVX/Hfamily. 3.6Vis the maximum supply voltage (Vsup). A normal operating voltage (Vsup) should remain above 2V. The D flip flop is embedded with 2ports.
74LVX374MTC Features
Tube package
74LVX series
74LVX374MTC Applications
There are a lot of Rochester Electronics, LLC 74LVX374MTC Flip Flops applications.
- Computers
- Matched Rise and Fall
- Storage registers
- Balanced Propagation Delays
- Counters
- ESD protection
- Latch-up performance
- Modulo – n – counter
- Balanced 24 mA output drivers
- Frequency Dividers