Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVTH |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVTH574 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2.7V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
150MHz |
Family |
LVT |
Current - Quiescent (Iq) |
190μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
5.9ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
5.9 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
6.6 ns |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
74LVTH574DB,112 Overview
The package is in the form of 20-SSOP (0.209, 5.30mm Width). The package Tubecontains it. It is configured with Tri-State, Non-Invertedas an output. This trigger uses the value Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 2.7V~3.6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. This electronic flip flop is of type D-Type. In terms of FPGAs, it belongs to the 74LVTH series. You should not exceed 150MHzin its output frequency. There are 1 elements in it. Despite external influences, it consumes 190μAof quiescent current. Currently, there are 20 terminations. If you search by 74LVTH574, you will find similar parts. The power source is powered by 3V. Its input capacitance is 4pF farads. The electronic device belongs to the LVTfamily. There is a base part number FF/Latchesfor the RS flip flops. As soon as 3.6Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be maintained above 2.7V for normal operation. The D latch operates on 3.3V volts. This flip flop has a total of 2ports.
74LVTH574DB,112 Features
Tube package
74LVTH series
3.3V power supplies
74LVTH574DB,112 Applications
There are a lot of NXP USA Inc. 74LVTH574DB,112 Flip Flops applications.
- Shift Registers
- Storage Registers
- Control circuits
- Clock pulse
- Synchronous counter
- QML qualified product
- Data transfer
- ATE
- Asynchronous counter
- Balanced Propagation Delays