| Parameters |
| Factory Lead Time |
9 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 1 week ago) |
| Contact Plating |
Gold |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins |
20 |
| Weight |
191mg |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
74LVTH |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Subcategory |
FF/Latches |
| Packing Method |
TAPE AND REEL |
| Technology |
BICMOS |
| Voltage - Supply |
2.7V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.65mm |
| Base Part Number |
74LVTH374 |
| Function |
Standard |
| Output Type |
Tri-State, Non-Inverted |
| Operating Supply Voltage |
3.3V |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Min (Vsup) |
2.7V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Number of Bits |
8 |
| Clock Frequency |
160MHz |
| Propagation Delay |
5 ns |
| Quiescent Current |
190μA |
| Turn On Delay Time |
4.8 ns |
| Family |
LVT |
| Logic Function |
D-Type, Flip-Flop |
| Current - Output High, Low |
32mA 64mA |
| Max I(ol) |
0.064 A |
| Max Propagation Delay @ V, Max CL |
4.9ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup |
4.9 ns |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3pF |
| Number of Output Lines |
3 |
| Clock Edge Trigger Type |
Positive Edge |
| Length |
6.5mm |
| Width |
4.4mm |
| Radiation Hardening |
No |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
74LVTH374MTCX Overview
20-TSSOP (0.173, 4.40mm Width)is the way it is packaged. It is contained within the Tape & Reel (TR)package. This output is configured with Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. Surface Mountmounts this electrical part. A 2.7V~3.6Vsupply voltage is required for it to operate. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. JK flip flop is a part of the 74LVTHseries of FPGAs. There should be no greater frequency than 160MHzon its output. In total, there are 1 elements. 20terminations have occurred. You can search similar parts based on 74LVTH374. A voltage of 3.3V is used to power it. This T flip flop has a capacitance of 3pF farads at the input. LVTis the family of this D flip flop. Surface Mount mounts this electronic component. The 20pins are designed into the board. This device exhibits a clock edge trigger type of Positive Edge. This part is included in FF/Latches. 8bits are used in its design. Keeping the supply voltage (Vsup) above 2.7V is necessary for normal operation. Using 8 circuits, it is highly flexible. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. High efficiency requires the supply voltage to be maintained at 3.3V. It is designed with 3 output lines. As a result, it consumes 190μA of quiescent current without being affected by external factors.
74LVTH374MTCX Features
Tape & Reel (TR) package
74LVTH series
20 pins
8 Bits
74LVTH374MTCX Applications
There are a lot of ON Semiconductor 74LVTH374MTCX Flip Flops applications.
- QML qualified product
- Patented noise
- Shift Registers
- Parallel data storage
- Registers
- Balanced Propagation Delays
- Circuit Design
- Differential Individual
- Data storage
- Power down protection