74LVQ174SJX

74LVQ174SJX

2V~3.6V 100MHz D-Type Flip Flop 74LVQ174 40μA 74LVQ Series 16-SOIC (0.209, 5.30mm Width)


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-74LVQ174SJX
  • Package: 16-SOIC (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 353
  • Description: 2V~3.6V 100MHz D-Type Flip Flop 74LVQ174 40μA 74LVQ Series 16-SOIC (0.209, 5.30mm Width)(Kg)

Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 16-SOIC (0.209, 5.30mm Width)
Supplier Device Package 16-SOP
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVQ
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 2V~3.6V
Base Part Number 74LVQ174
Function Master Reset
Output Type Non-Inverted
Number of Elements 1
Clock Frequency 100MHz
Current - Quiescent (Iq) 40μA
Current - Output High, Low 12mA 12mA
Number of Bits per Element 6
Max Propagation Delay @ V, Max CL 11.5ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 4.5pF

74LVQ174SJX Overview


It is packaged in the way of 16-SOIC (0.209, 5.30mm Width). A package named Tape & Reel (TR)includes it. Non-Invertedis the output configured for it. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 2V~3.6V. In this case, the operating temperature is -40°C~85°C TA. D-Typeis the type of this D latch. JK flip flop is a part of the 74LVQseries of FPGAs. A frequency of 100MHzshould be the maximum output frequency. D latch consists of 1 elements. It consumes 40μA of quiescent Members of the 74LVQ174family make up this object. Its input capacitance is 4.5pFfarads.

74LVQ174SJX Features


Tape & Reel (TR) package
74LVQ series

74LVQ174SJX Applications


There are a lot of ON Semiconductor 74LVQ174SJX Flip Flops applications.

  • Storage registers
  • Digital electronics systems
  • Communications
  • Computers
  • Circuit Design
  • Frequency Dividers
  • Latch-up performance
  • Test & Measurement
  • Individual Asynchronous Resets
  • Patented noise

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