74LVCH16374ADGVRE4
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 48-TFSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 48-TVSOP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVCH |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1.65V~3.6V |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Clock Frequency | 150MHz |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| RoHS Status | ROHS3 Compliant |
74LVCH16374ADGVRE4 Overview
In the form of 48-TFSOP (0.173, 4.40mm Width), it has been packaged. As part of the package Tape & Reel (TR), it is embedded. Currently, the output is configured to use Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountis occupied by this electronic component. A 1.65V~3.6Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~125°C TA. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74LVCHseries FPGA. It should not exceed 150MHzin its output frequency. D latch consists of 2 elements. T flip flop consumes 20μA quiescent energy. There is 5pF input capacitance for this T flip flop.
74LVCH16374ADGVRE4 Features
Tape & Reel (TR) package
74LVCH series
74LVCH16374ADGVRE4 Applications
There are a lot of Rochester Electronics, LLC 74LVCH16374ADGVRE4 Flip Flops applications.
- Latch
- Frequency Divider circuits
- Event Detectors
- Buffered Clock
- Computers
- Consumer
- Cold spare funcion
- Data transfer
- Synchronous counter
- Communications