74LVC377PW,112
| Parameters | |
|---|---|
| Factory Lead Time | 4 Weeks |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC377 |
| Function | Standard |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Bits | 8 |
| Clock Frequency | 330MHz |
| Propagation Delay | 6 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 7.6ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 6.5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC377PW,112 Overview
The flip flop is packaged in 20-TSSOP (0.173, 4.40mm Width). A package named Tubeincludes it. This output is configured with Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountis in the way of this electric part. It operates with a supply voltage of 1.65V~3.6V. A temperature of -40°C~125°C TAis used in the operation. This electronic flip flop is of type D-Type. It belongs to the 74LVCseries of FPGAs. You should not exceed 330MHzin its output frequency. There are 1 elements in it. It consumes 10μA of quiescent There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. It is a member of the 74LVC377 family. The power supply voltage is 2.7V. This JK flip flop has a 5pFfarad input capacitance. A device of this type belongs to the family of LVC/LCX/Z. In this case, the electronic component is mounted in the way of Surface Mount. A total of 20pins are provided on this board. Its clock edge trigger type is Positive Edge. There are 8bits in this flip flop. Vsup reaches its maximum value at 3.6V. A total of 8input lines have been provided. It consumes 100nA of quiescent current without being affected by external factors. It is also characterized by WITH HOLD MODE.
74LVC377PW,112 Features
Tube package
74LVC series
20 pins
8 Bits
74LVC377PW,112 Applications
There are a lot of Nexperia USA Inc. 74LVC377PW,112 Flip Flops applications.
- Data transfer
- Control circuits
- Guaranteed simultaneous switching noise level
- EMI reduction circuitry
- Automotive
- Consumer
- Patented noise
- Registers
- Latch-up performance
- Parallel data storage