74LVC374APW/AUJ
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 20-TSSOP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1.65V~3.6V |
| Base Part Number | 74LVC374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 150MHz |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| RoHS Status | ROHS3 Compliant |
74LVC374APW/AUJ Overview
The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. As part of the package Tape & Reel (TR), it is embedded. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with a trigger that uses Positive Edge. Surface Mountis positioned in the way of this electronic part. With a supply voltage of 1.65V~3.6V volts, it operates. It is operating at a temperature of -40°C~125°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. There should be no greater frequency than 150MHzon its output. The list contains 1 elements. There is 10μA quiescent consumption. If you search by 74LVC374, you will find similar parts. This T flip flop has a capacitance of 4pF farads at the input.
74LVC374APW/AUJ Features
Tape & Reel (TR) package
74LVC series
74LVC374APW/AUJ Applications
There are a lot of NXP USA Inc. 74LVC374APW/AUJ Flip Flops applications.
- Test & Measurement
- Single Up Count-Control Line
- ESD performance
- Automotive
- Synchronous counter
- ESD protection
- ATE
- Balanced Propagation Delays
- ESCC
- Individual Asynchronous Resets