74LVC374APW,112
| Parameters | |
|---|---|
| Factory Lead Time | 4 Weeks |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 150MHz |
| Propagation Delay | 11 ns |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 6.5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC374APW,112 Overview
The flip flop is packaged in 20-TSSOP (0.173, 4.40mm Width). It is included in the package Tube. Tri-State, Non-Invertedis the output configured for it. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis in the way of this electric part. It operates with a supply voltage of 1.65V~3.6V. In the operating environment, the temperature is -40°C~125°C TA. This D latch has the type D-Type. In this case, it is a type of FPGA belonging to the 74LVC series. Its output frequency should not exceed 150MHz Hz. In total, it contains 1 elements. There is a consumption of 10μAof quiescent energy. The number of terminations is 20. The 74LVC374family includes it. Power is supplied from a voltage of 2.7V volts. Input capacitance of this device is 4pF farads. Electronic devices of this type belong to the LVC/LCX/Zfamily. This electronic part is mounted in the way of Surface Mount. Basically, it is designed with a set of 20 pins. This device exhibits a clock edge trigger type of Positive Edge. It is designed with a number of bits of 8. 3.6Vis the maximum supply voltage (Vsup). A total of 2ports are embedded in the D flip flop. A total of 8input lines have been provided.
74LVC374APW,112 Features
Tube package
74LVC series
20 pins
8 Bits
74LVC374APW,112 Applications
There are a lot of Nexperia USA Inc. 74LVC374APW,112 Flip Flops applications.
- Dynamic threshold performance
- Patented noise
- Counters
- ESD protection
- Bounce elimination switch
- Memory
- Common Clocks
- Load Control
- Circuit Design
- Matched Rise and Fall