74LVC374AD-Q100J
| Parameters | |
|---|---|
| Factory Lead Time | 4 Weeks |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 3.3V |
| Base Part Number | 74LVC374 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Ports | 2 |
| Clock Frequency | 150MHz |
| Quiescent Current | 100nA |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC374AD-Q100J Overview
20-SOIC (0.295, 7.50mm Width)is the way it is packaged. It is contained within the Tape & Reel (TR)package. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with a trigger that uses a value of Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~3.6V. A temperature of -40°C~125°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. The FPGA belongs to the 74LVC series. This D flip flop should not have a frequency greater than 150MHz. D latch consists of 1 elements. As a result, it consumes 10μA quiescent current. The number of terminations is 20. Members of the 74LVC374family make up this object. The D flip flop is powered by a voltage of 3.3V . The input capacitance of this JK flip flopis 4pF farads. An electronic device belonging to the family LVC/LCX/Zcan be found here. There is an electronic part mounted in the way of Surface Mount. Vsup reaches 3.6V, the maximal supply voltage. A D flip flop with 2embedded ports is available. It consumes 100nA current.
74LVC374AD-Q100J Features
Tape & Reel (TR) package
74LVC series
74LVC374AD-Q100J Applications
There are a lot of Nexperia USA Inc. 74LVC374AD-Q100J Flip Flops applications.
- Event Detectors
- ESCC
- Guaranteed simultaneous switching noise level
- Cold spare funcion
- Storage registers
- Registers
- Shift Registers
- Circuit Design
- Balanced 24 mA output drivers
- Digital electronics systems