74LVC1G80GF,132
| Parameters | |
|---|---|
| Factory Lead Time | 13 Weeks |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2014 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.35mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Number of Elements | 1 |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Bits | 1 |
| Clock Frequency | 400MHz |
| Quiescent Current | 100nA |
| Turn On Delay Time | 1.8 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 200μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| RoHS Status | ROHS3 Compliant |
74LVC1G80GF,132 Overview
The flip flop is packaged in a case of 6-XFDFN. D flip flop is included in the Tape & Reel (TR)package. T flip flop is configured with an output of Inverted. JK flip flop uses Positive Edgeas the trigger. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. In the operating environment, the temperature is -40°C~125°C TA. It belongs to the type D-Typeof flip flops. JK flip flop is a part of the 74LVCseries of FPGAs. Its output frequency should not exceed 400MHz Hz. In total, it contains 1 elements. There is a consumption of 200μAof quiescent energy. There are 6 terminations,You can search similar parts based on 74LVC1G80. A voltage of 1.8V provides power to the D latch. Its input capacitance is 5pFfarads. An electronic device belonging to the family LVC/LCX/Zcan be found here. Surface Mount mounts this electronic component. With its 6pins, it is designed to work with most electronic flip flops. Its clock edge trigger type is Positive Edge. The flip flop is designed with 1bits. Vsup reaches 5.5V, the maximal supply voltage. This D latch consumes 100nA quiescent current at all.
74LVC1G80GF,132 Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
74LVC1G80GF,132 Applications
There are a lot of Nexperia USA Inc. 74LVC1G80GF,132 Flip Flops applications.
- Frequency division
- Automotive
- Storage registers
- Digital electronics systems
- Reduced system switching noise
- Dynamic threshold performance
- Bounce elimination switch
- Data storage
- Load Control
- Modulo – n – counter