74LVC1G79GW,165
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Number of Pins | 5 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | TIN |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC1G79 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 500MHz |
| Propagation Delay | 2.2 ns |
| Turn On Delay Time | 1.7 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 500μA |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 3.8ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | RoHS Compliant |
74LVC1G79GW,165 Overview
The item is packaged in 5-TSSOP, SC-70-5, SOT-353cases. As part of the package Tape & Reel (TR), it is embedded. Currently, the output is configured to use Non-Inverted. The trigger it is configured with uses Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at 1.65V~5.5Vvolts. The operating temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. FPGAs belonging to the 74LVCseries contain this type of chip. In order for it to function properly, its output frequency should not exceed 500MHz. T flip flop consumes 500μA quiescent energy. There are 5 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This D latch belongs to the family of 74LVC1G79. The power supply voltage is 1.8V. Its input capacitance is 5pF farads. LVC/LCX/Zis the family of this D flip flop. This electronic part is mounted in the way of Surface Mount. This board has 5 pins. It has a clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. An electronic part with 1bits has been designed. In order to achieve its superior flexibility, 1 circuits are used. This D flip flop is well suited for TAPE AND REEL based on its reliable performance. The system runs on a power supply of 3.3V watts.
74LVC1G79GW,165 Features
Tape & Reel (TR) package
74LVC series
5 pins
1 Bits
3.3V power supplies
74LVC1G79GW,165 Applications
There are a lot of Nexperia USA Inc. 74LVC1G79GW,165 Flip Flops applications.
- Instrumentation
- Clock pulse
- Count Modes
- Data storage
- Computers
- Matched Rise and Fall
- Power down protection
- Storage Registers
- Memory
- ATE