Parameters |
Factory Lead Time |
12 Weeks |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Cut Tape (CT) |
Series |
74HC |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Voltage - Supply |
2V~6V |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Clock Frequency |
90MHz |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
7.8mA 7.8mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
32ns @ 6V, 150pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
RoHS Status |
RoHS Compliant |
74HC374D Overview
As a result, it is packaged as 20-SOIC (0.295, 7.50mm Width). D flip flop is included in the Cut Tape (CT)package. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger uses the value Positive Edge. There is an electronic component mounted in the way of Surface Mount. A supply voltage of 2V~6V is required for operation. It is operating at a temperature of -40°C~125°C TA. This D latch has the type D-Type. It belongs to the 74HCseries of FPGAs. There should be no greater frequency than 90MHzon its output. D latch consists of 1 elements. During its operation, it consumes 4μA quiescent energy. Its input capacitance is 3pFfarads.
74HC374D Features
Cut Tape (CT) package
74HC series
74HC374D Applications
There are a lot of Toshiba Semiconductor and Storage 74HC374D Flip Flops applications.
- High Performance Logic for test systems
- Matched Rise and Fall
- Dynamic threshold performance
- Balanced Propagation Delays
- Control circuits
- Single Down Count-Control Line
- Supports Live Insertion
- Clock pulse
- Safety Clamp
- Parallel data storage