74HC107PW,112
| Parameters | |
|---|---|
| Factory Lead Time | 4 Weeks |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 2013 |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | JK Type |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC107 |
| Function | Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 85MHz |
| Propagation Delay | 240 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 15 ns |
| Family | HC/UH |
| Logic Function | Flip-Flop, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 27ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 3.5pF |
| fmax-Min | 60 MHz |
| Clock Edge Trigger Type | Negative Edge |
| Length | 5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74HC107PW,112 Overview
It is embeded in 14-TSSOP (0.173, 4.40mm Width) case. D flip flop is embedded in the Tube package. As configured, the output uses Differential. It is configured with the trigger Negative Edge. Surface Mountmounts this electrical part. A 2V~6Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~125°C TA. It is an electronic flip flop with the type JK Type. JK flip flop belongs to the 74HCseries of FPGAs. A frequency of 85MHzshould be the maximum output frequency. A total of 14terminations have been recorded. D latch belongs to the 74HC107 family. Power is supplied from a voltage of 5V volts. The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. HC/UHis the family of this D flip flop. There is an electronic part mounted in the way of Surface Mount. This board is designed with 14pins on it. This device has Negative Edgeas its clock edge trigger type. There is a 6Vmaximum supply voltage (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. The superior flexibility of this product is achieved by using 2 circuits. A high level of efficiency can be achieved by maintaining the supply voltage at 5V. It consumes 4μA current.
74HC107PW,112 Features
Tube package
74HC series
14 pins
74HC107PW,112 Applications
There are a lot of Nexperia USA Inc. 74HC107PW,112 Flip Flops applications.
- Functionally equivalent to the MC10/100EL29
- Balanced 24 mA output drivers
- Frequency division
- Test & Measurement
- Bus hold
- Modulo – n – counter
- Matched Rise and Fall
- Single Up Count-Control Line
- Divide a clock signal by 2 or 4
- Data Synchronizers