74FCT162823CTPACT
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Supplier Device Package | 56-TSSOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74FCT |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Type | D-Type |
| Voltage - Supply | 4.5V~5.5V |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Current - Quiescent (Iq) | 500μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 9 |
| Max Propagation Delay @ V, Max CL | 6ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| RoHS Status | ROHS3 Compliant |
74FCT162823CTPACT Overview
The flip flop is packaged in 56-TFSOP (0.240, 6.10mm Width). D flip flop is embedded in the Tape & Reel (TR) package. There is a Tri-State, Non-Invertedoutput configured with it. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. It operates with a supply voltage of 4.5V~5.5V. It is at -40°C~85°C TAdegrees Celsius that the system is operating. D-Typedescribes this flip flop. This type of FPGA is a part of the 74FCT series. There are 2 elements in it. There is 500μA quiescent consumption. The input capacitance of this T flip flop is 4.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded.
74FCT162823CTPACT Features
Tape & Reel (TR) package
74FCT series
74FCT162823CTPACT Applications
There are a lot of Rochester Electronics, LLC 74FCT162823CTPACT Flip Flops applications.
- Buffered Clock
- Dynamic threshold performance
- Memory
- Bus hold
- Storage Registers
- Communications
- Parallel data storage
- Single Up Count-Control Line
- 2 – Bit synchronous counter
- Memory