| Parameters |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tube |
| Series |
74F |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
MATTE TIN |
| Additional Feature |
BROADSIDE VERSION OF 534 |
| Technology |
TTL |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
NOT APPLICABLE |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT APPLICABLE |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Number of Ports |
2 |
| Clock Frequency |
100MHz |
| Family |
F/FAST |
| Current - Quiescent (Iq) |
86mA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
3mA 24mA |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
8.5ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Length |
26.075mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
74F564PC Overview
20-DIP (0.300, 7.62mm)is the packaging method. There is an embedded version in the package Tube. This output is configured with Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. Through Holeis positioned in the way of this electronic part. It operates with a supply voltage of 4.5V~5.5V. Currently, the operating temperature is 0°C~70°C TA. It belongs to the type D-Typeof flip flops. It is a type of FPGA belonging to the 74F series. Its output frequency should not exceed 100MHz Hz. The list contains 1 elements. It consumes 86mA of quiescent 20terminations have occurred. An input voltage of 5Vpowers the D latch. An electronic device belonging to the family F/FASTcan be found here. 5.5Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be kept above 4.5V. This flip flop has a total of 2ports. As an additional reference, you may refer to electronic flip flop BROADSIDE VERSION OF 534.
74F564PC Features
Tube package
74F series
74F564PC Applications
There are a lot of Rochester Electronics, LLC 74F564PC Flip Flops applications.
- Parallel data storage
- EMI reduction circuitry
- Buffer registers
- Synchronous counter
- Balanced Propagation Delays
- Computing
- Latch-up performance
- Counters
- ATE
- High Performance Logic for test systems