74ALVCH16823DGG:11
| Parameters | |
|---|---|
| Factory Lead Time | 4 Weeks |
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ALVCH |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2.3V~2.7V 3V~3.6V |
| Reach Compliance Code | unknown |
| Base Part Number | 74ALVCH16823 |
| Function | Master Reset |
| Output Type | Tri-State |
| Number of Elements | 2 |
| Clock Frequency | 350MHz |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 9 |
| Max Propagation Delay @ V, Max CL | 3.7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| RoHS Status | ROHS3 Compliant |
74ALVCH16823DGG:11 Overview
The flip flop is packaged in a case of 56-TFSOP (0.240, 6.10mm Width). The Tubepackage contains it. As configured, the output uses Tri-State. There is a trigger configured with Positive Edge. Surface Mountmounts this electrical part. It operates with a supply voltage of 2.3V~2.7V 3V~3.6V. It is operating at -40°C~85°C TA. D-Typedescribes this flip flop. It is a type of FPGA belonging to the 74ALVCH series. This D flip flop should not have a frequency greater than 350MHz. A total of 2elements are present in it. JK flip flop belongs to 74ALVCH16823 family. A JK flip flop with a 5pFfarad input capacitance is used here.
74ALVCH16823DGG:11 Features
Tube package
74ALVCH series
74ALVCH16823DGG:11 Applications
There are a lot of Nexperia USA Inc. 74ALVCH16823DGG:11 Flip Flops applications.
- Buffered Clock
- ATE
- Data Synchronizers
- Bounce elimination switch
- Shift Registers
- EMI reduction circuitry
- Individual Asynchronous Resets
- Convert a momentary switch to a toggle switch
- Differential Individual
- Counters