74ALVC74PW,118
| Parameters | |
|---|---|
| Factory Lead Time | 4 Weeks |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ALVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ALVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 2 |
| Clock Frequency | 425MHz |
| Propagation Delay | 6.2 ns |
| Quiescent Current | 200nA |
| Turn On Delay Time | 3.7 ns |
| Family | ALVC/VCX/A |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 3.8ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Output Lines | 1 |
| fmax-Min | 300 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74ALVC74PW,118 Overview
14-TSSOP (0.173, 4.40mm Width)is the packaging method. A package named Tape & Reel (TR)includes it. T flip flop is configured with an output of Differential. JK flip flop uses Positive Edgeas the trigger. It is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74ALVC series. It should not exceed 425MHzin its output frequency. There is a consumption of 10μAof quiescent energy. The number of terminations is 14. The 74ALVC74 family contains this object. Power is provided by a 1.8V supply. There is 3.5pF input capacitance for this T flip flop. In terms of electronic devices, this device belongs to the ALVC/VCX/Afamily of devices. A part of the electronic system is mounted in the way of Surface Mount. A total of 14pins are provided on this board. This device has Positive Edgeas its clock edge trigger type. Vsup reaches its maximum value at 3.6V. Using 2 circuits, it is highly flexible. There are 1 output lines in this JK flip flop. There is a consumption of 200nAof quiescent current from it.
74ALVC74PW,118 Features
Tape & Reel (TR) package
74ALVC series
14 pins
74ALVC74PW,118 Applications
There are a lot of Nexperia USA Inc. 74ALVC74PW,118 Flip Flops applications.
- Latch-up performance
- Matched Rise and Fall
- Pattern generators
- Memory
- Load Control
- Control circuits
- Single Up Count-Control Line
- Safety Clamp
- Asynchronous counter
- Clock pulse