74ACTQ574SJ
| Parameters | |
|---|---|
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 85MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9.5 ns |
| Width | 5.3mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACTQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Additional Feature | BROADSIDE VERSION OF 374 |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
74ACTQ574SJ Overview
20-SOIC (0.209, 5.30mm Width)is the way it is packaged. The package Tubecontains it. In the configuration, Tri-State, Non-Invertedis used as the output. It is configured with a trigger that uses Positive Edge. It is mounted in the way of Surface Mount. It operates with a supply voltage of 4.5V~5.5V. It is operating at a temperature of -40°C~85°C TA. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74ACTQ series. A frequency of 85MHzshould be the maximum output frequency. The list contains 1 elements. It consumes 40μA of quiescent It has been determined that there have been 20 terminations. A voltage of 5V is used to power it. There is 4.5pF input capacitance for this T flip flop. The electronic device belongs to the ACTfamily. Vsup reaches 5.5V, the maximal supply voltage. Normally, the supply voltage (Vsup) should be above 4.5V. The flip flop has 2ports embedded within it. In addition, you can refer to the additinal BROADSIDE VERSION OF 374 of the D latch.
74ACTQ574SJ Features
Tube package
74ACTQ series
74ACTQ574SJ Applications
There are a lot of Rochester Electronics, LLC 74ACTQ574SJ Flip Flops applications.
- Differential Individual
- Latch
- High Performance Logic for test systems
- Memory
- Digital electronics systems
- Bus hold
- Single Down Count-Control Line
- Patented noise
- Balanced 24 mA output drivers
- Convert a momentary switch to a toggle switch