74ACTQ574SCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACTQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Additional Feature | BROADSIDE VERSION OF 374 |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 85MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9.5 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ACTQ574SCX Overview
The package is in the form of 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tape & Reel (TR). Tri-State, Non-Invertedis the output configured for it. The trigger it is configured with uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. With a supply voltage of 4.5V~5.5V volts, it operates. -40°C~85°C TAis the operating temperature. D-Typedescribes this flip flop. It is a type of FPGA belonging to the 74ACTQ series. There should be no greater frequency than 85MHzon its output. The list contains 1 elements. There is 40μA quiescent consumption. A total of 20terminations have been recorded. A voltage of 5V provides power to the D latch. The input capacitance of this JK flip flopis 4.5pF farads. In this case, the D flip flop belongs to the ACTfamily. There is a 5.5Vmaximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be above 4.5V. A total of 2ports are embedded in the D flip flop. As an additional reference, you may refer to electronic flip flop BROADSIDE VERSION OF 374.
74ACTQ574SCX Features
Tape & Reel (TR) package
74ACTQ series
74ACTQ574SCX Applications
There are a lot of Rochester Electronics, LLC 74ACTQ574SCX Flip Flops applications.
- Storage Registers
- Buffered Clock
- Buffer registers
- Memory
- Safety Clamp
- Guaranteed simultaneous switching noise level
- ESCC
- Dynamic threshold performance
- Bounce elimination switch
- Pattern generators