74ACTQ374SJX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACTQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 85MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9.5 ns |
| Width | 5.3mm |
| RoHS Status | ROHS3 Compliant |
74ACTQ374SJX Overview
It is embeded in 20-SOIC (0.209, 5.30mm Width) case. You can find it in the Tape & Reel (TR)package. As configured, the output uses Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 4.5V~5.5V. Currently, the operating temperature is -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. In this case, it is a type of FPGA belonging to the 74ACTQ series. This D flip flop should not have a frequency greater than 85MHz. The list contains 1 elements. Despite external influences, it consumes 40μAof quiescent current. Terminations are 20. It is powered by a voltage of 5V . A JK flip flop with a 4.5pFfarad input capacitance is used here. A device of this type belongs to the family of ACT. There is a 5.5Vmaximum supply voltage (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 4.5V. The D flip flop is embedded with 2ports.
74ACTQ374SJX Features
Tape & Reel (TR) package
74ACTQ series
74ACTQ374SJX Applications
There are a lot of Rochester Electronics, LLC 74ACTQ374SJX Flip Flops applications.
- Digital electronics systems
- Control circuits
- Power down protection
- Bounce elimination switch
- Patented noise
- Automotive
- Balanced Propagation Delays
- Shift registers
- Test & Measurement
- Pattern generators