74ACT825SCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACT |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Additional Feature | WITH TRIPLE OUTPUT ENABLE |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G24 |
| Function | Master Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 158MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 80μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ACT825SCX Overview
The item is packaged in 24-SOIC (0.295, 7.50mm Width)cases. It is included in the package Tape & Reel (TR). Currently, the output is configured to use Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. It is operating at a temperature of -40°C~85°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. In order for it to function properly, its output frequency should not exceed 158MHz. A total of 1elements are contained within it. There is 80μA quiescent consumption. A total of 24 terminations have been made. An input voltage of 5Vpowers the D latch. There is 4.5pF input capacitance for this T flip flop. ACTis the family of this D flip flop. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be kept above 4.5V. This flip flop has a total of 2ports. In addition, WITH TRIPLE OUTPUT ENABLEis a characteristic of it.
74ACT825SCX Features
Tape & Reel (TR) package
74ACT series
74ACT825SCX Applications
There are a lot of Rochester Electronics, LLC 74ACT825SCX Flip Flops applications.
- Counters
- Balanced Propagation Delays
- Computing
- Power down protection
- Synchronous counter
- Single Up Count-Control Line
- Consumer
- Circuit Design
- Data storage
- Load Control