74ACT534SCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACT |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 100MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 11.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ACT534SCX Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. It is included in the package Tape & Reel (TR). T flip flop is configured with an output of Tri-State, Inverted. It is configured with a trigger that uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. Currently, the operating temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. In order for it to function properly, its output frequency should not exceed 100MHz. In total, it contains 1 elements. There is 40μA quiescent consumption. Currently, there are 20 terminations. The D flip flop is powered by a voltage of 5V . The input capacitance of this T flip flop is 4.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. ACTis the family of this D flip flop. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be kept above 4.5V. This flip flop has a total of 2ports.
74ACT534SCX Features
Tape & Reel (TR) package
74ACT series
74ACT534SCX Applications
There are a lot of Rochester Electronics, LLC 74ACT534SCX Flip Flops applications.
- Memory
- Consumer
- ESCC
- High Performance Logic for test systems
- Clock pulse
- Bounce elimination switch
- Dynamic threshold performance
- Individual Asynchronous Resets
- Guaranteed simultaneous switching noise level
- Counters