| Parameters |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins |
20 |
| Operating Temperature |
-55°C~125°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
74ACT |
| JESD-609 Code |
e4 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
NICKEL PALLADIUM GOLD |
| Subcategory |
FF/Latches |
| Packing Method |
TAPE AND REEL |
| Technology |
CMOS |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
| Supply Voltage |
5V |
| Terminal Pitch |
0.65mm |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Base Part Number |
74ACT273 |
| Function |
Master Reset |
| Qualification Status |
Not Qualified |
| Output Type |
Non-Inverted |
| Operating Supply Voltage |
5V |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Power Supplies |
5V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Number of Bits |
8 |
| Clock Frequency |
190MHz |
| Propagation Delay |
8.5 ns |
| Turn On Delay Time |
4 ns |
| Family |
ACT |
| Logic Function |
D-Type, Flip-Flop |
| Current - Quiescent (Iq) |
4μA |
| Current - Output High, Low |
24mA 24mA |
| Max I(ol) |
0.024 A |
| Max Propagation Delay @ V, Max CL |
8.5ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4pF |
| Clock Edge Trigger Type |
Positive Edge |
| Length |
6.5mm |
| Width |
4.4mm |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
74ACT273TTR Overview
It is packaged in the way of 20-TSSOP (0.173, 4.40mm Width). It is included in the package Tape & Reel (TR). T flip flop uses Non-Invertedas the output. Positive Edgeis the trigger it is configured with. Surface Mountmounts this electrical part. The JK flip flop operates at 4.5V~5.5Vvolts. Temperature is set to -55°C~125°C TA. A flip flop of this type is classified as a D-Type. The 74ACTseries comprises this type of FPGA. A frequency of 190MHzshould not be exceeded by its output. D latch consists of 1 elements. This process consumes 4μA quiescents. There have been 20 terminations. The object belongs to the 74ACT273 family. The D flip flop is powered by a voltage of 5V . The input capacitance of this JK flip flopis 4pF farads. Electronic devices of this type belong to the ACTfamily. The electronic part is mounted in the way of Surface Mount. A total of 20pins are provided on this board. This device exhibits a clock edge trigger type of Positive Edge. It is included in FF/Latches. An electronic part with 8bits has been designed. Despite its superior flexibility, it relies on 8 circuits to achieve it. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. The D latch operates on 5V volts. High efficiency requires the supply voltage to be maintained at 5V.
74ACT273TTR Features
Tape & Reel (TR) package
74ACT series
20 pins
8 Bits
5V power supplies
74ACT273TTR Applications
There are a lot of STMicroelectronics 74ACT273TTR Flip Flops applications.
- Test & Measurement
- Latch-up performance
- Memory
- ESD performance
- Guaranteed simultaneous switching noise level
- CMOS Process
- Load Control
- Circuit Design
- Bounce elimination switch
- Computing