Parameters |
Mounting Type |
Surface Mount |
Package / Case |
24-TSSOP (0.173, 4.40mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2014 |
Series |
74ABT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
WITH CLEAR AND CLOCK ENABLE |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ABT823 |
JESD-30 Code |
R-PDSO-G24 |
Function |
Master Reset |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
200MHz |
Family |
ABT |
Current - Quiescent (Iq) |
250μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
9 |
Max Propagation Delay @ V, Max CL |
6.1ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
6.8 ns |
Power Supply Current-Max (ICC) |
34mA |
Length |
7.8mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
74ABT823PW,112 Overview
The flip flop is packaged in 24-TSSOP (0.173, 4.40mm Width). Package Tubeembeds it. In the configuration, Tri-State, Non-Invertedis used as the output. Positive Edgeis the trigger it is configured with. It is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. The operating temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. FPGAs belonging to the 74ABTseries contain this type of chip. You should not exceed 200MHzin the output frequency of the device. D latch consists of 1 elements. This process consumes 250μA quiescents. In 24terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is a member of the 74ABT823 family. It is powered by a voltage of 5V . This T flip flop has a capacitance of 4pF farads at the input. This D flip flop belongs to the family of ABT. It is part of the FF/Latchesbase part number family. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. The supply voltage (Vsup) should be maintained above 4.5V for normal operation. An electrical current of 5V volts is applied to it. The flip flop has 2embedded ports. Additionally, there are WITH CLEAR AND CLOCK ENABLE on the electronic flip flop that can be referred to.
74ABT823PW,112 Features
Tube package
74ABT series
5V power supplies
74ABT823PW,112 Applications
There are a lot of NXP USA Inc. 74ABT823PW,112 Flip Flops applications.
- Common Clocks
- Modulo – n – counter
- Storage registers
- High Performance Logic for test systems
- ESCC
- Supports Live Insertion
- Buffer registers
- Set-reset capability
- Memory
- Communications