Parameters |
Mounting Type |
Surface Mount |
Package / Case |
24-SOIC (0.295, 7.50mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ABT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION; WITH POWER-UP RESET |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ABT821 |
JESD-30 Code |
R-PDSO-G24 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
185MHz |
Family |
ABT |
Current - Quiescent (Iq) |
250μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
10 |
Max Propagation Delay @ V, Max CL |
6.2ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
6.7 ns |
Power Supply Current-Max (ICC) |
38mA |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
74ABT821D,602 Overview
24-SOIC (0.295, 7.50mm Width)is the way it is packaged. Package Tubeembeds it. Tri-State, Non-Invertedis the output configured for it. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. It is operating at -40°C~85°C TA. A flip flop of this type is classified as a D-Type. In this case, it is a type of FPGA belonging to the 74ABT series. You should not exceed 185MHzin the output frequency of the device. A total of 1elements are present in it. There is a consumption of 250μAof quiescent energy. In 24terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74ABT821 family contains this object. The power source is powered by 5V. This T flip flop has a capacitance of 4pF farads at the input. Devices in the ABTfamily are electronic devices. This RS flip flops is a part number FF/Latches. Vsup reaches 5.5V, the maximal supply voltage. Normal operation requires a supply voltage (Vsup) above 4.5V. It operates from 5V power supplies. A D flip flop with 2embedded ports is available. Additionally, you may refer to the additional POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION; WITH POWER-UP RESET of the electronic flip flop.
74ABT821D,602 Features
Tube package
74ABT series
5V power supplies
74ABT821D,602 Applications
There are a lot of NXP USA Inc. 74ABT821D,602 Flip Flops applications.
- Balanced 24 mA output drivers
- 2 – Bit synchronous counter
- Power down protection
- Bus hold
- Frequency division
- Patented noise
- Clock pulse
- Buffer registers
- Automotive
- ESD performance