| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
48-TFSOP (0.240, 6.10mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74ABT |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
2 (1 Year) |
| Number of Terminations |
48 |
| Type |
D-Type |
| Terminal Finish |
MATTE TIN |
| Technology |
BICMOS |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.5mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
2 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Number of Ports |
2 |
| Clock Frequency |
150MHz |
| Family |
ABT |
| Current - Quiescent (Iq) |
2mA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
32mA 64mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
6.2ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
5pF |
| Width |
6.1mm |
| RoHS Status |
ROHS3 Compliant |
74ABT16374CMTD Overview
The package is in the form of 48-TFSOP (0.240, 6.10mm Width). There is an embedded version in the package Tube. In the configuration, Tri-State, Non-Invertedis used as the output. Positive Edgeis the trigger it is configured with. The electronic part is mounted in the way of Surface Mount. With a supply voltage of 4.5V~5.5V volts, it operates. In the operating environment, the temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. JK flip flop is a part of the 74ABTseries of FPGAs. A frequency of 150MHzshould not be exceeded by its output. In total, it contains 2 elements. As a result, it consumes 2mA quiescent current. There are 48 terminations,Power is supplied from a voltage of 5V volts. Its input capacitance is 5pF farads. In this case, the D flip flop belongs to the ABTfamily. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be above 4.5V. The D flip flop has no ports embedded.
74ABT16374CMTD Features
Tube package
74ABT series
74ABT16374CMTD Applications
There are a lot of Rochester Electronics, LLC 74ABT16374CMTD Flip Flops applications.
- Control circuits
- Computing
- Safety Clamp
- ATE
- Shift registers
- Frequency Dividers
- Divide a clock signal by 2 or 4
- Individual Asynchronous Resets
- Balanced Propagation Delays
- Cold spare funcion