| Parameters |
| Package / Case |
PQFP |
| Surface Mount |
YES |
| Number of Pins |
100 |
| Published |
1996 |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Discontinued |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
100 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Matte Tin (Sn) |
| Max Operating Temperature |
85°C |
| Min Operating Temperature |
-40°C |
| Additional Feature |
YES |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
245 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.65mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
100 |
| Operating Supply Voltage |
5V |
| Temperature Grade |
INDUSTRIAL |
| Number of I/O |
72 |
| Memory Type |
FLASH |
| Propagation Delay |
10 ns |
| Turn On Delay Time |
10 ns |
| Frequency (Max) |
66.7MHz |
| Organization |
0 DEDICATED INPUTS, 72 I/O |
| Number of Logic Blocks (LABs) |
8 |
| Speed Grade |
10 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
72 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
3.4mm |
| Length |
20mm |
| Width |
14mm |
| Radiation Hardening |
No |
| RoHS Status |
RoHS Compliant |
XC9572-10PQG100I Overview
A mobile phone network consists of 72macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The item is packaged with PQFP.As you can see, this device has 72 I/O ports programmed into it.It is programmed to terminate devices at [0].This electrical part has a terminal position of QUADand is connected to the ground.There is 5V voltage supply for this device.It is a part of family [0].With 100pins programmed, the chip is ready to use.This device can also display [0].For high efficiency, the supply voltage should be maintained at [0].For storing data, it is recommended to use [0].There are 100 pins embedded in the device.The operating temperature should be higher than -40°C.Temperatures should not exceed 85°C.Its basic building block is composed of 8 logic blocks (LABs).It is recommended that the maximal frequency be less than 0.
XC9572-10PQG100I Features
PQFP package
72 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
XC9572-10PQG100I Applications
There are a lot of Xilinx XC9572-10PQG100I CPLDs applications.
- Custom shift registers
- Discrete logic functions
- Address decoding
- Dedicated input registers
- Power Meter SMPS
- Software Configuration of Add-In Boards
- Programmable power management
- Handheld digital devices
- Wide Vin Industrial low power SMPS
- POWER-SAVING MODES