| Parameters |
| Surface Mount |
YES |
| Number of Pins |
100 |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
100 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Matte Tin (Sn) |
| Additional Feature |
YES |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.5mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
100 |
| Qualification Status |
Not Qualified |
| Operating Temperature (Min) |
-40°C |
| Operating Supply Voltage |
5V |
| Temperature Grade |
INDUSTRIAL |
| Number of I/O |
81 |
| Clock Frequency |
55.6MHz |
| Propagation Delay |
15 ns |
| Programmable Logic Type |
FLASH PLD |
| Number of Logic Blocks (LABs) |
8 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
144 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
1.6mm |
| Length |
14mm |
| Width |
14mm |
| RoHS Status |
Non-RoHS Compliant |
XC95144-15TQG100I Overview
Currently, there are 144 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.It is equipped with 81I/O ports.The termination of a device is set to [0].There is a QUADterminal position on the electrical part in question.It is powered from a supply voltage of 5V.There is a part in the family [0].With 100pins programmed, the chip is ready to use.Additionally, this device is capable of displaying [0].High efficiency requires the supply voltage to be maintained at [0].There are 100 pins embedded in the device.The system consists of 8 logic blocks (LABs).The clock frequency of the device should not exceed 55.6MHz.This kind of FPGA is composed of FLASH PLD.Temperatures should be maintained at least at [0].
XC95144-15TQG100I Features
81 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
XC95144-15TQG100I Applications
There are a lot of Xilinx XC95144-15TQG100I CPLDs applications.
- Field programmable gate
- Wide Vin Industrial low power SMPS
- Custom state machines
- Storage Cards and Storage Racks
- Bootloaders for FPGAs
- PULSE WIDTH MODULATION (PWM)
- Software-Driven Hardware Configuration
- Multiple DIP Switch Replacement
- Discrete logic functions
- Custom shift registers