XC95144-15PQG100I
| Parameters | |
|---|---|
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Number of I/O | 81 |
| Memory Type | FLASH |
| Propagation Delay | 15 ns |
| Turn On Delay Time | 15 ns |
| Frequency (Max) | 55.6MHz |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 15 |
| Output Function | MACROCELL |
| Number of Macro Cells | 144 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.4mm |
| Length | 20mm |
| Width | 14mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Package / Case | PQFP |
| Surface Mount | YES |
| Number of Pins | 100 |
| JESD-609 Code | e3 |
XC95144-15PQG100I Overview
144 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.A PQFP package contains the item.In this case, there are 81 I/Os programmed.100terminations have been programmed into the device.QUADis the terminal position of this electrical part.It is powered from a supply voltage of 5V.There is a part in the family [0].A chip with 100pins is programmed.If this device is used, you will also be able to find [0].For high efficiency, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].The 100pins are designed into the board.In order to operate properly, the operating temperature should be higher than -40°C.A temperature less than 85°Cshould be used for operation.8logic blocks (LABs) make up this circuit.The maximum frequency should not exceed 55.6MHz.
XC95144-15PQG100I Features
PQFP package
81 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
XC95144-15PQG100I Applications
There are a lot of Xilinx XC95144-15PQG100I CPLDs applications.
- Configurable Addressing of I/O Boards
- I/O PORTS (MCU MODULE)
- Custom state machines
- DDC INTERFACE
- Multiple Clock Source Selection
- Wide Vin Industrial low power SMPS
- Auxiliary Power Supply Isolated and Non-isolated
- Power automation
- Parity generators
- Timing control