| Parameters |
| Surface Mount |
YES |
| Number of Pins |
100 |
| JESD-609 Code |
e0 |
| Pbfree Code |
no |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
100 |
| Max Operating Temperature |
70°C |
| Min Operating Temperature |
0°C |
| Additional Feature |
YES |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
225 |
| Supply Voltage |
1.8V |
| Terminal Pitch |
0.5mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
100 |
| Operating Supply Voltage |
1.8V |
| Supply Voltage-Max (Vsup) |
1.9V |
| Temperature Grade |
COMMERCIAL |
| Number of I/O |
80 |
| Memory Type |
ROMless |
| Propagation Delay |
4.5 ns |
| Turn On Delay Time |
4.5 ns |
| Frequency (Max) |
333MHz |
| Programmable Logic Type |
FLASH PLD |
| Number of Logic Blocks (LABs) |
8 |
| Speed Grade |
4 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
128 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
1.2mm |
| Radiation Hardening |
No |
| RoHS Status |
RoHS Compliant |
XC2C128-4VQ100C Overview
Currently, there are 128 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.The device is programmed with 80 I/O ports.100terminations are programmed into the device.This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.Power is supplied by a voltage of 1.8V volts.The part is included in Programmable Logic Devices.In this chip, the 100pins are programmed.This device also displays [0].The supply voltage should be maintained at 1.8V for high efficiency.ROMless is adopted for storing data.The device is designed with pins [0].Vsup reaches 1.9Vas the maximum supply voltage.In order to operate properly, the operating temperature should be higher than 0°C.It is recommended that the operating temperature be lower than 70°C.The program consists of 8 logic blocks (LABs).Maximum frequency should be less than 333MHz.A programmable logic type is categorized as FLASH PLD.
XC2C128-4VQ100C Features
80 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
XC2C128-4VQ100C Applications
There are a lot of Xilinx XC2C128-4VQ100C CPLDs applications.
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Discrete logic functions
- Protection relays
- State machine design
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Digital designs
- Power Meter SMPS
- ROM patching
- High speed graphics processing
- PLC analog input modules