| Parameters |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
| Contact Plating |
Gold |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins |
20 |
| Weight |
76.997305mg |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Cut Tape (CT) |
| Series |
74LVTH |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Terminal Finish |
Matte Tin (Sn) |
| Subcategory |
FF/Latches |
| Packing Method |
TR |
| Technology |
BICMOS |
| Voltage - Supply |
2.7V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.65mm |
| Base Part Number |
74LVTH273 |
| Function |
Master Reset |
| Output Type |
Non-Inverted |
| Operating Supply Voltage |
3.3V |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
3.6V |
| Supply Voltage-Min (Vsup) |
2.7V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Output Current |
64mA |
| Number of Bits |
8 |
| Clock Frequency |
150MHz |
| Propagation Delay |
3.2 ns |
| Quiescent Current |
5mA |
| Turn On Delay Time |
3.2 ns |
| Family |
LVT |
| Logic Function |
D-Type, Flip-Flop |
| Current - Quiescent (Iq) |
190μA |
| Current - Output High, Low |
32mA 64mA |
| Max I(ol) |
0.064 A |
| Max Propagation Delay @ V, Max CL |
4.9ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup |
4.9 ns |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4pF |
| Clock Edge Trigger Type |
Positive Edge |
| Height |
1.2mm |
| Length |
6.5mm |
| Width |
4.4mm |
| Thickness |
1mm |
| Radiation Hardening |
No |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
SN74LVTH273PWR Overview
As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). It is contained within the Cut Tape (CT)package. There is a Non-Invertedoutput configured with it. Positive Edgeis the trigger it is configured with. In this case, the electronic component is mounted in the way of Surface Mount. It operates with a supply voltage of 2.7V~3.6V. Temperature is set to -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop belongs to the 74LVTHseries of FPGAs. A frequency of 150MHzshould be the maximum output frequency. In total, there are 1 elements. As a result, it consumes 190μA of quiescent current without being affected by external factors. 20terminations have occurred. D latch belongs to the 74LVTH273 family. A voltage of 3.3V is used to power it. Its input capacitance is 4pFfarads. In this case, the D flip flop belongs to the LVTfamily. Surface Mount mounts this electronic component. A total of 20pins are provided on this board. Its clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. This flip flop is designed with 8 Bits. Vsup reaches 3.6V, the maximal supply voltage. Normal operation requires a supply voltage (Vsup) above 2.7V. The superior flexibility is achieved through the use of 8 circuits. A reliable performance of this D flip flop makes it well suited for use in TR. Optimal efficiency requires a supply voltage of 3.3V. The 64mA output current allows it to be designed with the greatest amount of flexibility. In terms of quiescent current, it consumes 5mA .
SN74LVTH273PWR Features
Cut Tape (CT) package
74LVTH series
20 pins
8 Bits
SN74LVTH273PWR Applications
There are a lot of Texas Instruments SN74LVTH273PWR Flip Flops applications.
- Latch
- Shift Registers
- Differential Individual
- Instrumentation
- Shift registers
- Convert a momentary switch to a toggle switch
- Functionally equivalent to the MC10/100EL29
- Single Down Count-Control Line
- Load Control
- ESD performance