SN74LS374DW
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Series | 74LS |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | TTL |
| Voltage - Supply | 4.75V~5.25V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74LS374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Channels | 8 |
| Load Capacitance | 45pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 50MHz |
| Propagation Delay | 28 ns |
| Turn On Delay Time | 20 ns |
| Family | LS |
| Logic Function | D-Type, Latch |
| Current - Quiescent (Iq) | 40mA |
| Current - Output High, Low | 2.6mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 28ns @ 5V, 45pF |
| Trigger Type | Positive Edge |
| Power Supply Current-Max (ICC) | 40mA |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LS374DW Overview
The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. The Tubepackage contains it. T flip flop uses Tri-State, Non-Invertedas its output configuration. In the configuration of the trigger, Positive Edgeis used. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.75V~5.25V. The operating temperature is 0°C~70°C TA. It belongs to the type D-Typeof flip flops. The FPGA belongs to the 74LS series. This D flip flop should not have a frequency greater than 50MHz. The element count is 1 . Despite external influences, it consumes 40mAof quiescent current. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74LS374 family contains this object. An input voltage of 5Vpowers the D latch. It belongs to the family of electronic devices known as LS. In this case, the electronic component is mounted in the way of Surface Mount. A total of 20pins are provided on this board. There is a clock edge trigger type of Positive Edgeon this device. This device is part of the FF/Latchesbase part number family. Flip flops designed with 8bits are used in this part. The power supply is 5V. There are 2 ports embedded in the flip flops. For high efficiency, the supply voltage should be kept at 5V. With a current output of 24mA , it offers maximum design flexibility. This input has 3lines. 8is the number of channels.
SN74LS374DW Features
Tube package
74LS series
20 pins
8 Bits
5V power supplies
SN74LS374DW Applications
There are a lot of Texas Instruments SN74LS374DW Flip Flops applications.
- Computers
- Patented noise
- Instrumentation
- Load Control
- Test & Measurement
- Reduced system switching noise
- Guaranteed simultaneous switching noise level
- Storage Registers
- Dynamic threshold performance
- Frequency division