MC14027BDR2
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Surface Mount | YES |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 4000B |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Voltage - Supply | 3V~18V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Min (Vsup) | 3V |
| Clock Frequency | 13MHz |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Trigger Type | Positive Edge |
| Propagation Delay (tpd) | 350 ns |
| fmax-Min | 6.5 MHz |
| Length | 9.9mm |
| Width | 3.9mm |
| RoHS Status | Non-RoHS Compliant |
MC14027BDR2 Overview
16-SOIC (0.154, 3.90mm Width)is the way it is packaged. It is contained within the Tape & Reel (TR)package. Differentialis the output configured for it. This trigger is configured to use Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 3V~18Vis used as the supply voltage. It is at -55°C~125°C TAdegrees Celsius that the system is operating. JK Typeis the type of this D latch. It is a type of FPGA belonging to the 4000B series. It should not exceed 13MHzin terms of its output frequency. There are 2 elements in it. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. An input voltage of 5Vpowers the D latch. The supply voltage (Vsup) should be maintained above 3V for normal operation.
MC14027BDR2 Features
Tape & Reel (TR) package
4000B series
MC14027BDR2 Applications
There are a lot of Rochester Electronics, LLC MC14027BDR2 Flip Flops applications.
- Control circuits
- Bus hold
- Data Synchronizers
- EMI reduction circuitry
- Latch
- Shift Registers
- 2 – Bit synchronous counter
- Balanced 24 mA output drivers
- Differential Individual
- Divide a clock signal by 2 or 4