| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
208-BFQFP |
| Surface Mount |
YES |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tray |
| Published |
1995 |
| Series |
MACH® 5 |
| JESD-609 Code |
e0 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
208 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Tin/Lead (Sn85Pb15) |
| Additional Feature |
YES |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
225 |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.5mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
M5LV-512 |
| Pin Count |
208 |
| JESD-30 Code |
S-PQFP-G208 |
| Qualification Status |
Not Qualified |
| Operating Supply Voltage |
3.3V |
| Programmable Type |
In System Programmable |
| Max Supply Voltage |
3.6V |
| Min Supply Voltage |
3V |
| Number of I/O |
160 |
| Memory Type |
EEPROM |
| Propagation Delay |
12 ns |
| Number of Gates |
20000 |
| Max Frequency |
71.4MHz |
| Number of Programmable I/O |
48 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
512 |
| JTAG BST |
YES |
| Voltage Supply - Internal |
3V~3.6V |
| Delay Time tpd(1) Max |
12ns |
| Height Seated (Max) |
4.1mm |
| Length |
28mm |
| Width |
28mm |
| RoHS Status |
Non-RoHS Compliant |
M5LV-512/160-12YC Overview
Currently, there are 512 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.The item is packaged with 208-BFQFP.The device is programmed with 160 I/Os.The termination of a device is set to [0].The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.There is 3.3V voltage supply for this device.There is a part in the family [0].It is recommended that the chip be packaged by Tray.Ensure its reliability by operating at [0].Ensure that the chip is mounted by Surface Mount.This type of FPGA is a part of the MACH? 5 series.The chip is programmed with 208 pins.This device can also display [0].The M5LV-512indicates that related parts can be found.A digital circuit is built using 20000gates.Optimal efficiency requires a supply voltage of [0].In this case, EEPROMwill be used to store the data.It operates with the maximal supply voltage of 3.6V.Normally, it operates with a voltage of 3VV as its minimum supply voltage.A total of 48Programmable I/Os are present.It should be below 71.4MHzat the maximal frequency.
M5LV-512/160-12YC Features
208-BFQFP package
160 I/Os
The operating temperature of 0°C~70°C TA
208 pin count
M5LV-512/160-12YC Applications
There are a lot of Lattice Semiconductor Corporation M5LV-512/160-12YC CPLDs applications.
- ToR/Aggregation/Core Switch and Router
- POWER-SAVING MODES
- PULSE WIDTH MODULATION (PWM)
- Programmable power management
- Bootloaders for FPGAs
- DMA control
- Timing control
- Custom shift registers
- INTERRUPT SYSTEM
- Wireless Infrastructure Base Band Unit and Remote Radio Unit