| Parameters |
| Mount |
Surface Mount |
| Package / Case |
PQFP |
| Number of Pins |
208 |
| JESD-609 Code |
e3 |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
208 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Matte Tin (Sn) |
| Max Operating Temperature |
90°C |
| Min Operating Temperature |
0°C |
| Additional Feature |
YES |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
245 |
| Supply Voltage |
1.8V |
| Terminal Pitch |
0.5mm |
| Frequency |
333MHz |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| Pin Count |
208 |
| Operating Supply Voltage |
1.8V |
| Max Supply Voltage |
1.95V |
| Min Supply Voltage |
1.65V |
| Operating Supply Current |
22mA |
| Number of I/O |
149 |
| Nominal Supply Current |
22mA |
| RAM Size |
32kB |
| Memory Type |
EEPROM, SRAM |
| Propagation Delay |
4.5 ns |
| Turn On Delay Time |
4.5 ns |
| Frequency (Max) |
275MHz |
| Organization |
0 DEDICATED INPUTS, 149 I/O |
| Programmable Logic Type |
EE PLD |
| Number of Programmable I/O |
256 |
| Number of Logic Blocks (LABs) |
16 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
512 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
4.1mm |
| Length |
28mm |
| Width |
28mm |
| Radiation Hardening |
No |
| RoHS Status |
RoHS Compliant |
LC5512MC-45QN208C Overview
There are 512 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.In the PQFPpackage, you will find it.There are 149 I/Os programmed in it.Terminations of devices are set to [0].QUADis the terminal position of this electrical part.It is powered by a voltage of 1.8V volts.The part is included in Programmable Logic Devices.208pins are programmed on the chip.The device can also be used to find [0].High efficiency requires a voltage supply of [0].For storing data, it is recommended to use [0].In this case, Surface Mountis used to mount the electronic component.It is designed with 208 pins.It operates at a maximum supply voltage of 1.95V volts.A minimum supply voltage of 1.65V is required for this device to operate.Currently, there are 256 Programmable I/Os available.There can be 333MHz frequency achieved.There should be a temperature above 0°Cat the time of operation.Temperatures should not exceed 90°C.In total, it contains 16 logic blocks (LABs).It is recommended that the maximum frequency be less than 275MHz.In programmable logic, a type of logic can be categorized as EE PLD.
LC5512MC-45QN208C Features
PQFP package
149 I/Os
208 pin count
208 pins
16 logic blocks (LABs)
LC5512MC-45QN208C Applications
There are a lot of Lattice Semiconductor LC5512MC-45QN208C CPLDs applications.
- Handheld digital devices
- I/O expansion
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Wide Vin Industrial low power SMPS
- USB Bus
- Storage Cards and Storage Racks
- Cross-Matrix Switch
- Custom state machines
- Multiple Clock Source Selection
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)