| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
240-BFQFP Exposed Pad |
| Surface Mount |
YES |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tray |
| Series |
MAX® 9000 |
| JESD-609 Code |
e0 |
| Pbfree Code |
no |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
240 |
| Terminal Finish |
TIN LEAD |
| Additional Feature |
676 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
220 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.5mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
240 |
| JESD-30 Code |
S-PQFP-G240 |
| Qualification Status |
COMMERCIAL |
| Supply Voltage-Max (Vsup) |
5.25V |
| Supply Voltage-Min (Vsup) |
4.75V |
| Programmable Type |
In System Programmable |
| Number of I/O |
175 |
| Clock Frequency |
117.6MHz |
| Propagation Delay |
16.4 ns |
| Number of Gates |
10000 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
480 |
| Voltage Supply - Internal |
4.75V~5.25V |
| Delay Time tpd(1) Max |
15ns |
| Number of Logic Elements/Blocks |
30 |
| Height Seated (Max) |
4.1mm |
| Length |
32mm |
| Width |
32mm |
| RoHS Status |
Non-RoHS Compliant |
EPM9480RC240-15 Overview
480 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a 240-BFQFP Exposed Pad package.This device has 175 I/O ports programmed into it.240terminations are programmed into the device.The terminal position of this electrical component is QUAD.The device is powered by a voltage of 5V volts.Trayis the packaging method.To ensure reliability, the device operates at a temperature of [0].There should be a Surface Mounton the chip.In FPGA terms, it is a type of MAX? 9000series FPGA.A chip with 240pins is programmed.Additionally, this device is capable of displaying [0].10000gates are devices that serve as building blocks for digital circuits.In total, there are 30 logic elements/blocks.Supply voltage (Vsup) reaches a maximum of 5.25V.Ensure that the supply voltage (Vsup) exceeds 4.75V.It should not exceed 117.6MHzin terms of clockfrequency.
EPM9480RC240-15 Features
240-BFQFP Exposed Pad package
175 I/Os
The operating temperature of 0°C~70°C TA
240 pin count
EPM9480RC240-15 Applications
There are a lot of Rochester Electronics, LLC EPM9480RC240-15 CPLDs applications.
- Bootloaders for FPGAs
- Power up sequencing
- DMA control
- Random logic replacement
- Portable digital devices
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Interface bridging
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- DDC INTERFACE
- Power Meter SMPS