EPM7064QI100-15
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PQFP |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Qualification Status | Not Qualified |
| Power Supplies | 3.3/55V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 15 ns |
| Turn On Delay Time | 15 ns |
| Frequency (Max) | 151.5MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 15 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 3.65mm |
| Length | 20mm |
| RoHS Status | RoHS Compliant |
EPM7064QI100-15 Overview
64macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.The product is contained in a PQFP package.It is programmed with 68 I/Os.It is programmed that device terminations will be 100 .This electrical part is wired with a terminal position of QUAD.Power is provided by a supply voltage of 5V volts.The part is included in Programmable Logic Devices.There are 100pins on the chip.It is also characterized by CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.There are 1250 gates, which are devices that acts as a building block for digital circuits. It is recommended that data be stored in [0].The electronic component is mounted by Surface Mount.100pins are included in its design.It operates at a maximum supply voltage of 3.6V volts.With a minimal supply voltage of [0], it operates.It operates from 3.3/55V power supplies.There are a total of 68 Programmable I/Os.This frequency can be achieved at 100MHz.In order to operate properly, the operating temperature should be higher than -40°C.Temperatures should not exceed 85°C.There are 4 logic blocks (LABs) in its basic building block.A maximum frequency of less than 151.5MHzis recommended.Programmable logic types are divided into EE PLD.
EPM7064QI100-15 Features
PQFP package
68 I/Os
100 pin count
100 pins
3.3/55V power supplies
4 logic blocks (LABs)
EPM7064QI100-15 Applications
There are a lot of Altera EPM7064QI100-15 CPLDs applications.
- State machine control
- PULSE WIDTH MODULATION (PWM)
- Synchronous or asynchronous mode
- TIMERS/COUNTERS
- I/O expansion
- Wide Vin Industrial low power SMPS
- Discrete logic functions
- Handheld digital devices
- State machine design
- Pattern recognition