| Parameters |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 5 days ago) |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
16-SOIC (0.154, 3.90mm Width) |
| Number of Pins |
16 |
| Weight |
141.690917mg |
| Operating Temperature |
-55°C~125°C TA |
| Packaging |
Tube |
| Series |
74HC |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
16 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature |
WITH DUAL OUTPUT ENABLE |
| Subcategory |
FF/Latches |
| Technology |
CMOS |
| Voltage - Supply |
2V~6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
4.5V |
| Base Part Number |
74HC173 |
| Function |
Master Reset |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
6V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Channels |
4 |
| Load Capacitance |
50pF |
| Output Current |
7.8mA |
| Number of Bits |
4 |
| Clock Frequency |
60MHz |
| Propagation Delay |
200 ns |
| Turn On Delay Time |
17 ns |
| Family |
HC/UH |
| Logic Function |
D-Type, Flip-Flop |
| Current - Quiescent (Iq) |
8μA |
| Current - Output High, Low |
7.8mA 7.8mA |
| Max I(ol) |
0.0078 A |
| Max Propagation Delay @ V, Max CL |
34ns @ 6V, 50pF |
| Prop. Delay@Nom-Sup |
60 ns |
| Trigger Type |
Positive Edge |
| Input Capacitance |
10pF |
| Power Supply Current-Max (ICC) |
0.08mA |
| Number of Input Lines |
2 |
| Number of Output Lines |
3 |
| Clock Edge Trigger Type |
Positive Edge |
| Height |
1.75mm |
| Length |
9.9mm |
| Width |
3.91mm |
| Thickness |
1.58mm |
| Radiation Hardening |
No |
| REACH SVHC |
No SVHC |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
CD74HC173M Overview
It is packaged in the way of 16-SOIC (0.154, 3.90mm Width). As part of the package Tube, it is embedded. T flip flop uses Tri-State, Non-Invertedas the output. Positive Edgeis the trigger it is configured with. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at 2V~6Vvolts. -55°C~125°C TAis the operating temperature. There is D-Type type of electronic flip flop associated with this device. In terms of FPGAs, it belongs to the 74HC series. A frequency of 60MHzshould be the maximum output frequency. The list contains 1 elements. There is 8μA quiescent consumption. There have been 16 terminations. The 74HC173 family contains it. An input voltage of 4.5Vpowers the D latch. This T flip flop has a capacitance of 10pF farads at the input. A device of this type belongs to the family of HC/UH. In this case, the electronic component is mounted in the way of Surface Mount. This board has 16 pins. A Positive Edgeclock edge trigger is used in this device. The part is included in FF/Latches. It is designed with a number of bits of 4. It reaches 6Vwhen the supply voltage is maximal (Vsup). The supply voltage (Vsup) should be maintained above 2V for normal operation. This T flip flop features a maximum design flexibility due to its output current of 7.8mA. It is designed with 3 output lines. It has 2lines. In addition, you can refer to the additinal WITH DUAL OUTPUT ENABLE of the D latch. 4 channels are available.
CD74HC173M Features
Tube package
74HC series
16 pins
4 Bits
CD74HC173M Applications
There are a lot of Texas Instruments CD74HC173M Flip Flops applications.
- Balanced Propagation Delays
- Counters
- Buffer registers
- QML qualified product
- Balanced 24 mA output drivers
- Data storage
- Safety Clamp
- Cold spare funcion
- Frequency division
- Circuit Design