| Parameters |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
-40°C~125°C TA |
| Packaging |
Tube |
| Series |
74HC |
| JESD-609 Code |
e4 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
NICKEL PALLADIUM GOLD |
| Additional Feature |
WITH HOLD MODE |
| Subcategory |
FF/Latches |
| Packing Method |
BULK PACK |
| Technology |
CMOS |
| Voltage - Supply |
2V~6V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
74HC377 |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
6V |
| Power Supplies |
2/6V |
| Supply Voltage-Min (Vsup) |
2V |
| Load Capacitance |
50pF |
| Clock Frequency |
83MHz |
| Family |
HC/UH |
| Current - Quiescent (Iq) |
8μA |
| Current - Output High, Low |
5.2mA 5.2mA |
| Output Polarity |
TRUE |
| Max I(ol) |
0.004 A |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
27ns @ 6V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3.5pF |
| fmax-Min |
60 MHz |
| Max Frequency@Nom-Sup |
24000000Hz |
| Height Seated (Max) |
4.2mm |
| Length |
26.73mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
74HC377N,652 Overview
20-DIP (0.300, 7.62mm)is the packaging method. The package Tubecontains it. T flip flop uses Non-Invertedas the output. In the configuration of the trigger, Positive Edgeis used. There is an electronic component mounted in the way of Through Hole. The JK flip flop operates at a voltage of 2V~6V. In the operating environment, the temperature is -40°C~125°C TA. This logic flip flop is classified as type D-Type. JK flip flop belongs to the 74HCseries of FPGAs. It should not exceed 83MHzin terms of its output frequency. D latch consists of 1 elements. It consumes 8μA of quiescent current without being affected by external factors. There are 20 terminations,You can search similar parts based on 74HC377. A voltage of 5V is used as the power supply for this D latch. Its input capacitance is 3.5pF farads. Electronic devices of this type belong to the HC/UHfamily. It is part of the FF/Latchesbase part number family. It reaches 6Vwhen the maximum supply voltage (Vsup) is applied. Normally, the supply voltage (Vsup) should be above 2V. This D flip flop is well suited for BULK PACK based on its reliable performance. A power supply of 2/6Vis required to operate it. Additionally, it is characterized by WITH HOLD MODE.
74HC377N,652 Features
Tube package
74HC series
2/6V power supplies
74HC377N,652 Applications
There are a lot of NXP USA Inc. 74HC377N,652 Flip Flops applications.
- Bounce elimination switch
- Data transfer
- Latch
- Balanced Propagation Delays
- Data Synchronizers
- Frequency division
- Buffered Clock
- Bus hold
- Cold spare funcion
- Power down protection