| Parameters |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tube |
| Series |
74F |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
MATTE TIN |
| Additional Feature |
WITH HOLD MODE |
| Technology |
TTL |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
NOT APPLICABLE |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT APPLICABLE |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Clock Frequency |
130MHz |
| Family |
F/FAST |
| Current - Quiescent (Iq) |
48mA |
| Current - Output High, Low |
1mA 20mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
7ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Propagation Delay (tpd) |
9 ns |
| Length |
26.075mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
74F377PC Overview
As a result, it is packaged as 20-DIP (0.300, 7.62mm). As part of the package Tube, it is embedded. Non-Invertedis the output configured for it. This trigger uses the value Positive Edge. Through Holeis in the way of this electric part. A voltage of 4.5V~5.5Vis required for its operation. Temperature is set to 0°C~70°C TA. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74Fseries of FPGAs. You should not exceed 130MHzin its output frequency. In total, it contains 1 elements. This process consumes 48mA quiescents. 20terminations have occurred. A voltage of 5V is used as the power supply for this D latch. This D flip flop belongs to the family of F/FAST. 5.5Vis the maximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 4.5V. In addition, WITH HOLD MODEis a characteristic of it.
74F377PC Features
Tube package
74F series
74F377PC Applications
There are a lot of Rochester Electronics, LLC 74F377PC Flip Flops applications.
- Single Up Count-Control Line
- Single Down Count-Control Line
- ESD performance
- Guaranteed simultaneous switching noise level
- Instrumentation
- Functionally equivalent to the MC10/100EL29
- Latch
- EMI reduction circuitry
- Buffer registers
- Parallel data storage