74ALVCH16823DL,518
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 56 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ALVCH |
| JESD-609 Code | e4 |
| Part Status | Not For New Designs |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | WITH CLEAR AND CLOCK ENABLE |
| Technology | CMOS |
| Voltage - Supply | 2.3V~2.7V 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.635mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ALVCH16823 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Ports | 2 |
| Number of Bits | 9 |
| Clock Frequency | 350MHz |
| Propagation Delay | 2.7 ns |
| Turn On Delay Time | 2.8 ns |
| Family | ALVC/VCX/A |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 3.7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 9 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74ALVCH16823DL,518 Overview
The flip flop is packaged in a case of 56-BSSOP (0.295, 7.50mm Width). There is an embedded version in the package Tape & Reel (TR). T flip flop is configured with an output of Tri-State, Non-Inverted. It is configured with a trigger that uses Positive Edge. Surface Mountmounts this electrical part. The supply voltage is set to 2.3V~2.7V 3V~3.6V. It is at -40°C~85°C TAdegrees Celsius that the system is operating. D-Typedescribes this flip flop. In this case, it is a type of FPGA belonging to the 74ALVCH series. A frequency of 350MHzshould be the maximum output frequency. In total, there are 2 elements. Currently, there are 56 terminations. This D latch belongs to the family of 74ALVCH16823. Power is supplied from a voltage of 1.8V volts. Its input capacitance is 5pFfarads. Devices in the ALVC/VCX/Afamily are electronic devices. There is an electronic component mounted in the way of Surface Mount. With its 56pins, it is designed to work with most electronic flip flops. This device has Positive Edgeas its clock edge trigger type. Flip flops designed with 9bits are used in this part. There is a 3.6Vmaximum supply voltage (Vsup). The flip flop has 2ports embedded within it. There are no output lines on the JK flip flop. It is also characterized by WITH CLEAR AND CLOCK ENABLE.
74ALVCH16823DL,518 Features
Tape & Reel (TR) package
74ALVCH series
56 pins
9 Bits
74ALVCH16823DL,518 Applications
There are a lot of Nexperia USA Inc. 74ALVCH16823DL,518 Flip Flops applications.
- CMOS Process
- Buffer registers
- Frequency division
- QML qualified product
- Shift registers
- Latch
- Matched Rise and Fall
- Dynamic threshold performance
- Data transfer
- Frequency Dividers