74ACT374SC
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 1998 |
| Series | 74ACT |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 160MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 10ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ACT374SC Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. The package Tubecontains it. The output it is configured with uses Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. There is an electric part mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis required for its operation. Temperature is set to -40°C~85°C TA. It belongs to the type D-Typeof flip flops. In this case, it is a type of FPGA belonging to the 74ACT series. A frequency of 160MHzshould be the maximum output frequency. In total, it contains 1 elements. This process consumes 40μA quiescents. Terminations are 20. The power source is powered by 5V. Its input capacitance is 4.5pFfarads. It is a member of the ACTfamily of D flip flop. Vsup reaches its maximum value at 5.5V. Keeping the supply voltage (Vsup) above 4.5V is necessary for normal operation. A total of 2ports are embedded in the D flip flop.
74ACT374SC Features
Tube package
74ACT series
74ACT374SC Applications
There are a lot of Rochester Electronics, LLC 74ACT374SC Flip Flops applications.
- Divide a clock signal by 2 or 4
- Consumer
- Test & Measurement
- Control circuits
- Circuit Design
- Shift Registers
- Instrumentation
- Cold spare funcion
- Safety Clamp
- EMI reduction circuitry